|Article#||Article Title & Authors||Page|
Simon Polstra1, Tessa E. Pronk1, Andy D.Pimentel1, Timo M. Breit2
Ryad Ben-El-Kezadri1, Farouk Kamoun2
Process Variation Aware Transistor Sizing for Load Balance of Multiple Paths in Dynamic CMOS for Timing Optimization
Kumar Yelamarthi, Chien-In Henry Chen
Shouling He, Xuping Xu
Modeling of Leakage Current Mechanisms in Nanoscale DG MOSFET and its Application to Low Power SRAM Design
Deblina Sarkar1, Deepanjan Datta2, S.Dasgupta3
Keivan Navi1, Omid Kavehei1, Mahnoush Ruholamini2, Amir Sahafi2, Shima Mehrabi2, Nooshin Dadkhahi2
Dynamic Module Library for System Level Modeling and Simulation of Dynamically Reconfigurable Systems
Kenji Asano1, Junji Kitamichi2, Kenichi Kuroda2
B. Borah, D.K. Bhattacharyya
Jan 20, 2017 News!
Vol.12, No.6 has been published with online version. [Click]
Jan 16, 2017 News!
Vol.12, No.5 has been published with online version. [Click]
Oct 09, 2016 News!
Vol.12, No.4 has been published with online version. [Click]
Sep 02, 2016 News!
Vol.11, No.3 has been indexed by EI (Inspec). [Click]
Aug 18, 2016 News!
Vol.11, No.2 has been indexed by EI (Inspec). [Click]
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