Volume 2 Number 9 (Nov. 2007)
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JCP 2007 Vol.2(9): 50-59 ISSN: 1796-203X
doi: 10.4304/jcp.2.9.50-59

Programming Highly Parallel Reconfigurable Architectures for Symmetric and Asymmetric Cryptographic Applications

Giovanni Agosta, Luca Breveglieri, Gerardo Pelosi, Martino Sykora
1Politecnico di Milano, Dipartimento di Elettronica e Informazione (DEI) Via Ponzio, 34/5, 20133 Milano, Italy

Abstract—Tiled architectures are emerging as an architectural platform that allows high levels of instruction level parallelism. Traditional compiler parallelization techniques are usually employed to generate programs for these architectures. However, for specific application domains, the compiler is not able to effectively exploit the domain knowledge. In this paper, we propose a new programming model that, by means of the definition of software function units, allows domain-specific features to be explicitly modeled, achieving good performances while reducing development times with respect to low-level programming. Identity-based cryptographic algorithms are known to be computationally intensive and difficult to parallelize automatically. Recent advances have led to the adoption of embedded cryptographic coprocessors to speed up both traditional and identity-based public key algorithms. We show the effectiveness of the proposed programming model by applying it to the case of computationally intensive cryptographic algorithms in both identity-based and traditional algorithms. Custom-designed coprocessors have high development costs and times with respect to general purpose or DSP coprocessors. Therefore, the proposed methodology can be effectively employed to reduce time to market while preserving performances. It also represents a starting point for the definition of cryptography-oriented programming languages. We prove that tiled architecture well compare w.r.t. competitors implementations such as StrongARM and FPGAs.

Index Terms—identity-based cryptography, tiled architectures, parallel programming model, reconfigurable architectures, multiobjective exploration

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Cite: Giovanni Agosta, Luca Breveglieri, Gerardo Pelosi, Martino Sykora, "Programming Highly Parallel Reconfigurable Architectures for Symmetric and Asymmetric Cryptographic Applications," Journal of Computers vol. 2, no.9, pp. 50-59, 2007.

General Information

ISSN: 1796-203X
Abbreviated Title: J.Comput.
Frequency: Monthly
Editor-in-Chief: Prof. Liansheng Tan
Executive Editor: Ms. Nina Lee
Abstracting/ Indexing: DBLP, EBSCO,  ProQuest, INSPEC, ULRICH's Periodicals Directory, WorldCat, CNKI,etc
E-mail: jcp@iap.org
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