Volume 9 Number 7 (Jul. 2014)
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JCP 2014 Vol.9(7): 1566-1571 ISSN: 1796-203X
doi: 10.4304/jcp.9.7.1566-1571

Evaluation of DGEMM Implementation on Intel Xeon Phi Coprocessor

Pawel Gepner1, Victor Gamayunov1, David L. Fraser1, Eric Houdard1, Ludovic Sauge2, Damien Declat2, Mathieu Dubois2
1Intel Corporation, Pipers Way, Swindon Wiltshire SN3 1RJ, United Kingdom
2Bull, 1, rue de Provence, 38432 Echirolles Cedex, France


Abstract—In this paper we will present a detailed study of implementing double-precision matrix-matrix multiplication (DGEMM) utilizing the Intel Xeon Phi Coprocessor. We discuss a DGEMM algorithm implementation running "natively" on the coprocessor, minimizing communication with the host CPU. We will run DGEMM across a range of matrix sizes natively as well using Intel Math Kernel Library. Our optimizations were designed to support maximal reuse of on-die cache, which significantly reduces transfer from GDDR. Finally we analyze the improvement of a classic matrix multiplication implementation based on Cauchy algorithm compared to the latest results achieved using the Intel Math Kernel Library DGEMM subroutine.

Index Terms—Intel Xeon Phi coprocessor, high performance computing, matrix-matrix multiplication, performance measurements, Intel Math Kernel Library

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Cite: Pawel Gepner, Victor Gamayunov, David L. Fraser, Eric Houdard, Ludovic Sauge, Damien Declat, Mathieu Dubois, "Evaluation of DGEMM Implementation on Intel Xeon Phi Coprocessor," Journal of Computers vol. 9, no. 7, pp. 1566-1571, 2014.

General Information

ISSN: 1796-203X
Frequency: Monthly
Editor-in-Chief: Prof. Liansheng Tan
Executive Editor: Ms. Nina Lee
Abstracting/ Indexing: DBLP, EBSCO,  ProQuest, INSPEC, ULRICH's Periodicals Directory, WorldCat, CNKI,etc
E-mail: jcp@iap.org
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