¹State Key Lab of ASIC and Systems, Fudan University, Shanghai, China
²School of Engineering and the Built Environment, Edinburgh Napier University, Edinburgh, UK

---

Abstract—This paper proposes an efficient architecture independent packing method for commercial FPGA. All specific logics of commercial FPGA such as carry chain arithmetic, x-LUT, are pre-designed into reference circuits according to its architecture. Due to complex architecture of contemporary FPGA, to enumerate all reference circuits in a fine-grain manner is impractical. To overcome this problem, coarse-grain manner is adapted in the approach. By using constraint satisfaction problem technique the proposed method matches pre-designed reference circuits from the given user logic circuit. Transformation from the reference circuit to the pre-packed cluster is simplified by using several specifically designed instructions. In the next stage, those directly connected FFs are absorbed into the pre-packed clusters. The Last stage packs LUTs and FFs into clusters in a delay-based manner. This method is architecture independent and can be applied for any other commercial FPGAs as long as the pre-designed reference circuits are modified accordingly. The results obtained and compared with commercial tool, ISE MAP, and academic tool, PAM MAP, have shown the effectiveness of the proposed method.

Index Terms—Packing, Algorithm, Computer-aided design, FPGA

[PDF]

Cite: Meng Yang, Jinmei Lai, A. E. A. Almaini, "An Architecture Independent Packing Method for LUT-based Commercial FPGA," Journal of Computers vol. 9, no. 5, pp. 1131-1137, 2014.