Volume 9 Number 8 (Aug. 2014)
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JCP 2014 Vol.9(8): 1851-1857 ISSN: 1796-203X
doi: 10.4304/jcp.9.8.1851-1857

Design and Implementation of Data Synchronization System Based on FPGA

Xiaoli Wang, Bing Chen
School of Mechanical, Electrical and Information Engineering, Shandong University, Weihai 264209, China

Abstract—This paper mainly aims at solving the problems of sampled data synchronization in digital substation based on Filed Programable Gate Array (FPGA). Compared with traditional substations, the design achieves data synchronization without connecting an external clock. Synchronization algorithm is based on Newton interpolation algorithm. The system consists of multi-channel data sampling module, synchronization module, Ethernet module etc. The design realizes the concept of modular design with FPGA processor, ensuring that each sub-module gets parallel execution. It is verified that speed is improved to ns level which is difficult to achieve in current systems. Finally, software simulations and hardware tests prove the accuracy and efficiency of the design. Therefore, the design is of great significance for the automation level in smart grid, especially for the enhancement and development.

Index Terms—data synchronization system, Newton interpolation algorithm, merging unit (MU), Filed Programmable Gate Array (FPGA)

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Cite: Xiaoli Wang, Bing Chen, "Design and Implementation of Data Synchronization System Based on FPGA," Journal of Computers vol. 9, no. 8, pp. 1851-1857, 2014.

General Information

ISSN: 1796-203X
Abbreviated Title: J.Comput.
Frequency: Bimonthly
Editor-in-Chief: Prof. Liansheng Tan
Executive Editor: Ms. Nina Lee
Abstracting/ Indexing: DBLP, EBSCO,  ProQuest, INSPEC, ULRICH's Periodicals Directory, WorldCat,etc
E-mail: jcp@iap.org
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