Volume 3 Number 8 (Aug. 2008)
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JCP 2008 Vol.3(8): 49-57 ISSN: 1796-203X
doi: 10.4304/jcp.3.8.49-57

Design Overview Of Processor Based Implantable Pacemaker

Santosh Chede, Kishore Kulat
1Department of Electronics and Computer Science Engineering, Visvesvaraya National Institute of Technology, Nagpur, India

Abstract—Implantable pacemaker is a battery operated real time embedded system, which includes software/hardware codesign strategy. As it is placed within the heart by surgery, battery life is an important constraint to extend device lifetime. In this paper, pacemaker’s functionalities like basic pacing, pulse width, refractory period in VOO mode has been realized using ultralow power processor MSP 430F1611 and IAR workbench. Software related instruction level instantaneous current is measured and Current/Energy performance, battery longevity is tested. It is verified that, change in pure cost and interinstruction cost (current/Energy) varies from 2.0 to 3.0 %. This methodology seems to be an innovative concept in software related energy estimation of such power critical real time system.

Index Terms—ultra low power, implantable pacemaker, real time system, current consumption, low power modes, VOO mode

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Cite: Santosh Chede, Kishore Kulat, "Design Overview Of Processor Based Implantable Pacemaker," Journal of Computers vol. 3, no. 8, pp. 49-57, 2008.

General Information

ISSN: 1796-203X
Abbreviated Title: J.Comput.
Frequency: Monthly
Editor-in-Chief: Prof. Liansheng Tan
Executive Editor: Ms. Nina Lee
Abstracting/ Indexing: DBLP, EBSCO,  ProQuest, INSPEC, ULRICH's Periodicals Directory, WorldCat, CNKI,etc
E-mail: jcp@iap.org
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