Volume 8 Number 3 (Mar. 2013)
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JCP 2013 Vol.8(3): 594-604 ISSN: 1796-203X
doi: 10.4304/jcp.8.3.594-604

An Efficient Implementation of H.264/AVC Integer Motion Estimation Algorithm on Coarsegrained Reconfigurable Computing System

Kiem-Hung Nguyen, Peng Cao, and Xue-Xiang Wang
National ASIC system Engineering Research Center, Southeast University, Nanjing, China

Abstract—Variable block size integer motion estimation (VBS-IME) is one of several tools which contribute to H.264/AVC’s excellent coding efficiency. However, its high computational complexity and huge memory access bandwidth make it difficult to implement. Therefore, a hardware accelerator is indispensable for full-search VBSIME in real-time video encoding applications. To overcome some of the limitations of conventional microprocessors and fine-grained reconfigurable devices in the field of multimedia and communication baseband processing, we have proposed a coarse-grained dynamically reconfigurable computing system, called REMUS. The paper presents architecture and compiling flow proposed for REMUS system, and shows that it is possible to implement a high complexity application as H.264/AVC full-search VBS-IME algorithm with competitive performance on platform of REMUS system. Experimental results have proven that the REMUS system operating at 200 MHz can perform VBSIME at real-time speed for CIF/SDTV@30fps video sequences with two reference frames and maximum search range of [-16,15]/[-8,7]. The implementation, therefore, can apply for H.264/AVC encoder in mobile multimedia applications. REMUS system is designed and synthesized by using TSMC 65nm low power technology. The die size of REMUS is 23.7 mm2. REMUS consumes about 194mW while working at 200MHz.

Index Terms—Reconfigurable Computing, REMUS, Coarsegrained Dynamically Reconfigurable Architecture, H264/AVC, Variable Block Size Integer Motion Estimation.

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Cite: Kiem-Hung Nguyen, Peng Cao, and Xue-Xiang Wang, " An Efficient Implementation of H.264/AVC Integer Motion Estimation Algorithm on Coarsegrained Reconfigurable Computing System," Journal of Computers vol. 8, no. 3, pp. 594-604, 2013.

General Information

ISSN: 1796-203X
Abbreviated Title: J.Comput.
Frequency: Bimonthly
Editor-in-Chief: Prof. Liansheng Tan
Executive Editor: Ms. Nina Lee
Abstracting/ Indexing: DBLP, EBSCO,  ProQuest, INSPEC, ULRICH's Periodicals Directory, WorldCat,etc
E-mail: jcp@iap.org
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