Volume 12 Number 5 (Sep. 2017)
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JCP 2017 Vol.12(5): 442-450 ISSN: 1796-203X
doi: 10.17706/jcp.12.5.442-450

A Hardware Architecture of Particle Swarm Optimization

Yiqin Lu, Peikun Wang, Jiancheng Qin
School of Electronic and Information Engineering, South China University of Technology, Guangzhou, China.
Abstract—Particle Swarm Optimization (PSO) is a useful algorithm to deal with non-linear problems such as route economic management optimization, vehicle routing optimization and so on. Several different kinds of improved PSO algorithms is provided to further increase its searching performance, which means PSO can deal with various kinds of situation through these improved algorithms. Moreover, Multi-Swarm strategy of PSO (MSPSO) is introduced to avoid premature and reach the optimal solution with less iteration time. However, software implementation of MSPSO is too time-consuming to be employed into real-time application when particles number and iterations time are huge, even on high-speed computer. Moreover, the synchronous hardware architecture of MSPSO is ineffective since it cannot achieve the maximum performance of each module during the calculation. In order to accelerate the processing speed of MSPSO, an asynchronous architecture of MSPSO based on Field-Programmable Gate Array (FPGA) is proposed in this research. The asynchronous architecture can improve the efficiency by executing the function of each module independently with maximum performance. In addition, Asynchronous Wrapper (AW) with handshaking protocol is adopted to connect core modules and peripheral modules, which can greatly enhance the stability of data exchange. The experimental results confirm that the asynchronous approach can drastically reduce the calculation time compared with synchronous approach.

Index Terms—Particle swarm optimization, asynchronous architecture, asynchronous wrapper.

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Cite: Yiqin Lu, Peikun Wang, Jiancheng Qin, "A Hardware Architecture of Particle Swarm Optimization," Journal of Computers vol. 12, no. 5, pp. 442-450, 2017.

General Information

ISSN: 1796-203X
Abbreviated Title: J.Comput.
Frequency: Monthly
Editor-in-Chief: Prof. Liansheng Tan
Executive Editor: Ms. Nina Lee
Abstracting/ Indexing: DBLP, EBSCO,  ProQuest, INSPEC, ULRICH's Periodicals Directory, WorldCat, CNKI,etc
E-mail: jcp@iap.org
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